1. Field of the Invention
The present invention relates to liquid crystal display devices and methods of driving the same and, in particular, to a liquid crystal display device including active elements and a method of driving the same.
2. Description of the Background Art
A description of the structure and the operating principles of a typical active matrix TFT (Thin Film Transistor) liquid crystal display device (hereafter simply called a liquid crystal display device) is provided. The liquid crystal display device has pixels arranged in a matrix on a translucent substrate, and gate lines and source lines interconnected to surround the pixels. Provided at the intersection of each gate line and each source line is a TFT, an active element, whose drain electrode is connected to a pixel. An opposed substrate is provided in an opposed position to the array substrate on which the pixels are formed. The opposed substrate and the array substrate have a liquid crystal interposed therebetween. The opposed substrate has opposed electrodes formed thereon, which are set to common potential. It may therefore be understood that the drain electrode of the TFT is connected to capacitance that is connected to the common potential of the opposed electrode. The liquid crystal capacitance is typically represented as CLC. A storage capacitor CS is also formed in parallel to the liquid crystal capacitance CLC in the liquid crystal display device.
The gate lines are connected to a gate driver which is supplied with a start pulse STV and a vertical clock CLKV from a timing controller. The gate driver shifts the start pulse STV at timing of the vertical clock CLKV by a shift register, and level-shifts the contents of the shift register by an output buffer, to output desired gate potentials Vgh (gate-ON voltage) and Vgl (gate-OFF voltage). A gate line is selected once during one vertical interval, and the selected period is of almost the same length as one horizontal interval. The gate line is in an ON state during that period, and in an OFF state during the other periods.
The source lines are connected to a source driver. The source lines themselves have parasitic capacitance. The source driver is supplied with a start pulse STH, a data signal DATA, and a horizontal clock CLKH from the timing controller. With the start pulse STH as a reference point, the source driver captures the data signal DATA at timing of the horizontal clock CLKH successively and stores them in a shift data register. The source driver also subjects the value stored in the shift data register to D/A conversion by a D/A converter based on a latch signal LP supplied from the timing controller, and outputs it to the source lines via an output buffer.
When the data signal DATA is subjected to D/A conversion, a POL signal supplied from the timing controller is latched by the latch signal LP, and the output from the D/A converter has a voltage of positive polarity or negative polarity due to the polarity of the POL signal in the source driver. As well known, a liquid crystal deteriorates upon being kept applied with DC voltage, resulting in a fault such as image persistence. Therefore, the liquid crystal display device adopts a driving system of inverting the polarity of voltage applied to the liquid crystal at regular intervals.
One vertical period is the most commonly adopted polarity inversion period of a liquid crystal display device. Frame inversion of the entire screen having the same polarity is a spatial inversion method during one vertical period. With frame inversion, however, a subtle difference between positive-polarity applied voltage and negative-polarity applied voltage will be visually identified as flicker. Therefore, row-inversion drive with inversion at intervals of n rows, column-inversion drive with inversion at intervals of m columns, and n×m dot inversion drive with inversion at intervals of n rows and m columns, each of which has a fine same-polarity area spatially mixed, are widely adopted.
One vertical interval includes a vertical effective interval and a vertical blanking interval. The panel is scanned in a vertical direction during the vertical effective interval, and no gate line is selected during the vertical blanking interval. The source lines hold a potential written in the last line during the vertical blanking interval if left uncontrolled. A short vertical blanking interval presents no problem, but a long one has adverse effects such as described below.
A TFT does not completely become OFF and leaks to some extent when not selected. The amount of leakage depends on a drain-source voltage VDS of the TFT. Thus when the potential of a source line is at extremely high voltage during the vertical blanking interval, a pixel A written with a voltage of positive polarity approaches the extremely high voltage relatively gently, while a pixel B having the same gradation as the pixel A and written with a voltage of negative polarity approaches the extremely high voltage suddenly. With such change, the pixel A grows dark while the pixel B grows light (in normally white mode). When the image is a still image, the same thing occurs with opposite polarities in the next frame. That is, when the potential of a source line is at extremely low voltage during the vertical blanking interval, the pixel A written with a voltage of negative polarity grows dark while the pixel B written with a voltage of positive polarity grows light.
The above problem is caused by not only the TFT leakage but parasitic capacitance CDS across the drain and source. When the source lines are inverted at intervals of n rows, pixel potential varies constantly under the influence of the parasitic capacitance CDS. Thus a pixel potential influenced by the potential of the last row is held during the vertical blanking interval, resulting in the same problem as described above.
The above problem causes a difference in shade between the pixels A and B, and also causes an effective DC component to be applied to the liquid crystal, which leads to liquid crystal deterioration. To reduce power consumption, the liquid crystal display device adopts a low frame frequency driving system in which an image is temporarily written and then held for a couple of vertical periods for a still image, for example. The low frame frequency driving system is adopted particularly for liquid crystal display devices intended for battery-driven mobile equipment. In a liquid crystal display device with the low frame frequency driving system, a blanking interval is significantly extended, which further encourages the above problem.
To address the problem, Japanese Patent Application Laid-Open Nos. 5-313607 (1993) and 2003-173 are proposed.
Japanese Patent Application Laid-Open No. 5-313607 adopts inversion drive of inverting voltage applied to source lines during a vertical blanking interval. This method, however, increases power consumption because the source lines need to be driven during the vertical blanking interval when they do not originally need to be driven. The method disclosed in JP 5-313607 thus cannot be adopted for a liquid crystal display device with the low frame frequency driving system for low power consumption.
Japanese Patent Application Laid-Open No. 2003-173 discloses a method of temporarily charging source lines to common potential after the start of a vertical blanking interval. This method is adaptable to the low frame frequency driving system. Yet this method requires a separate charging circuit which increases the circuit size.